Training BJT & MOSFET Amplifiers — Biasing & Small-Signal Models MOSFET Common-Source Amplifier — Biasing & Small-Signal Analysis
2 / 2

MOSFET Common-Source Amplifier — Biasing & Small-Signal Analysis

60 min BJT & MOSFET Amplifiers — Biasing & Small-Signal Models

MOSFET Common-Source Amplifier — Biasing & Small-Signal Analysis

The MOSFET is a voltage-controlled current source with zero gate current, making its bias analysis simpler than the BJT but its transconductance $g_m$ lower for the same drain current. The common-source (CS) configuration is the MOSFET analogue of the common-emitter amplifier and delivers voltage gain with high input impedance — ideal for sensor interfaces and low-noise front-ends.

1. NMOS I–V Characteristics & Bias Point

In saturation ($V_{DS} > V_{GS} - V_{TN}$), the NMOS drain current is:

$$I_D = \frac{k_n W}{2L}(V_{GS} - V_{TN})^2 = \frac{k_n'}{2}(V_{GS} - V_{TN})^2$$

where $V_{TN}$ is the threshold voltage (0.5–2 V) and $k_n' = \mu_n C_{ox} W/L$ is the process transconductance parameter. The overdrive voltage $V_{OV} = V_{GS} - V_{TN}$ sets the operating point: lower $V_{OV}$ gives lower noise; higher $V_{OV}$ gives higher $g_m$ for the same current.

2. Self-Bias (Source-Degeneration) Bias

With a single gate resistor $R_G$ from $V_{GG}$ (or voltage-divider $R_{G1}, R_{G2}$) and source resistor $R_S$:

$$V_{GS} = V_G - I_D R_S$$

Substituting into the drain-current equation gives a quadratic in $I_D$. The stable operating point satisfies both the load line $V_{GS} = V_G - I_D R_S$ and the transistor equation — solved graphically or algebraically.

3. MOSFET Small-Signal Parameters

Evaluated at the Q-point $(I_{DQ}, V_{GSQ})$:

$$g_m = \sqrt{2 k_n' I_{DQ}} = k_n' V_{OV} \qquad r_o = \frac{1}{\lambda I_{DQ}} \qquad g_{mb} = \eta g_m$$

where $\lambda$ (channel-length modulation) $\approx 0.01{-}0.1$ V$^{-1}$ and $\eta \approx 0.1{-}0.3$ accounts for body effect (in bulk CMOS). Note: $g_m \propto \sqrt{I_D}$ for MOSFET vs $g_m \propto I_C$ for BJT — the MOSFET is a weaker amplifier at moderate current.

4. CS Mid-Band Gain & Frequency Response

With $R_S$ bypassed and load $R_D \| R_L$:

$$A_v = -g_m (R_D \| R_L \| r_o)$$

The dominant high-frequency pole is the Miller-multiplied $C_{gd}$ (gate–drain capacitance, typically 1–5 fF per μm of gate width in modern CMOS, or 2–10 pF in discrete MOSFETs):

$$f_{p1} \approx \frac{1}{2\pi R_s'(C_{gs} + C_{gd}(1+g_m R_D'))}$$

where $R_s' = R_s \| R_{G1} \| R_{G2}$ and $R_D' = R_D \| r_o \| R_L$.

Worked Example — NMOS CS Amplifier Q-Point

$V_{DD} = 5$ V, $R_{G1} = 1$ M$\Omega$, $R_{G2} = 500$ k$\Omega$, $R_D = 2$ k$\Omega$, $R_S = 1$ k$\Omega$ (bypassed), $k_n' = 2$ mA/V², $V_{TN} = 1$ V.

$V_G = 5 \times 500/(1000+500) = 1.667$ V. With $R_S$ bypassed for AC (but included for DC bias): $V_{GS} = V_G - I_D R_S = 1.667 - I_D(1000)$. Substituting: $I_D = 10^{-3}(1.667 - 1000 I_D - 1)^2 = 10^{-3}(0.667 - 1000 I_D)^2$. Let $x = I_D$ mA: $x = (0.667-x)^2$. $x = 0.445-1.334x+x^2$. $x^2 - 2.334x + 0.445 = 0$. $x = (2.334 \pm \sqrt{5.447-1.78})/2 = (2.334 \pm 1.914)/2$. Taking smaller root: $x = 0.210$ mA. $V_{GS} = 1.667 - 0.210 = 1.457$ V, $V_{OV} = 0.457$ V. $g_m = 2\times 10^{-3}\times 0.457 = 0.914$ mA/V. $A_v = -0.914 \times 2 = -1.83$ V/V (with $r_o \to \infty$). ✓

NMOS CS Amplifier — Bias & Small-Signal
V_GS =?V
I_D =?mA
V_DS =?V
g_m =?mA/V

Practice Problems

1. For an NMOS with $k_n' = 5$ mA/V², $V_{TN} = 0.8$ V, biased at $I_D = 0.5$ mA: compute $V_{OV}$, $g_m$, and the overdrive-to-$V_T$ ratio $V_{OV}/V_{TN}$. Contrast with a BJT at the same current: compare $g_m$ values.
2. A CS stage uses $R_D = 5$ k$\Omega$, $g_m = 3$ mA/V, $r_o = 50$ k$\Omega$, $C_{gs} = 3$ pF, $C_{gd} = 1$ pF, $R_s = 1$ k$\Omega$. Compute mid-band gain, then $C_{Miller}$ and dominant pole frequency $f_{p1}$.
3. Explain why the MOSFET gate current is zero in DC steady state but non-zero at high frequencies. What is the input impedance of a CS stage at 100 MHz with $C_{gs} = 5$ pF?
BJT Biasing & Small-Signal Model — Hybrid-π Parameters Back to Module