Training BJT & MOSFET Amplifiers — Biasing & Small-Signal Models BJT Biasing & Small-Signal Model — Hybrid-π Parameters
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BJT Biasing & Small-Signal Model — Hybrid-π Parameters

60 min BJT & MOSFET Amplifiers — Biasing & Small-Signal Models

BJT Biasing & Small-Signal Model — Hybrid-π Parameters

The BJT is a voltage-controlled current source: a small base–emitter voltage variation $v_{be}$ produces a large collector current variation $\Delta i_C = g_m v_{be}$. The DC bias point (Q-point) sets the transconductance $g_m$ and all small-signal parameters. Stable biasing requires negative feedback via an emitter resistor or a voltage-divider base network to resist $\beta$ variation and thermal drift.

1. Voltage-Divider Bias Circuit

The standard four-resistor bias network ($V_{CC}$, $R_{B1}$, $R_{B2}$, $R_C$, $R_E$) is analysed by replacing $V_{CC}$–$R_{B1}$–$R_{B2}$ with the Thevenin equivalent:

$$V_{TH} = V_{CC}\frac{R_{B2}}{R_{B1}+R_{B2}}, \qquad R_{TH} = R_{B1}\|R_{B2}$$

KVL around the base–emitter loop (assuming $V_{BE} = 0.7$ V for silicon):

$$I_B = \frac{V_{TH} - V_{BE}}{R_{TH} + (1+\beta)R_E}$$

Collector current: $I_C = \beta I_B$. Collector–emitter voltage from KVL on the output loop:

$$V_{CE} = V_{CC} - I_C(R_C + R_E) - I_B R_E \approx V_{CC} - I_C(R_C + R_E)$$

Active region requires $V_{CE} > V_{CE,sat} \approx 0.2$ V. The bias is robust (Q-point nearly independent of $\beta$) when $R_{TH} \leq (1+\beta)R_E / 10$.

2. Hybrid-π Small-Signal Parameters

At the Q-point $I_C$, the following small-signal parameters are evaluated:

$$g_m = \frac{I_C}{V_T} \quad (V_T = kT/q \approx 26\text{ mV at } 300\text{ K})$$

$$r_{\pi} = \frac{\beta}{g_m} \qquad r_o = \frac{V_A + V_{CE}}{I_C} \approx \frac{V_A}{I_C}$$

where $V_A$ is the Early voltage (50–200 V for common BJTs). For $I_C = 1$ mA: $g_m = 38.5$ mA/V, $r_{\pi} = \beta/g_m$.

3. Common-Emitter Mid-Band Gain

With a bypass capacitor across $R_E$ (AC ground), the mid-band small-signal equivalent gives:

$$A_v = \frac{v_{out}}{v_{in}} = -g_m(R_C \| r_o \| R_L)$$

Input resistance: $R_{in} = R_{B1}\|R_{B2}\|r_{\pi}$. Output resistance (looking into collector): $R_{out} = R_C \| r_o$.

4. Frequency Response — Miller Effect

The collector–base capacitance $C_\mu$ (typically 2–10 pF) is bootstrapped by voltage gain $A_v$, appearing as an equivalent Miller capacitance at the input:

$$C_{Miller} = C_\mu(1 + g_m R_C')$$

The dominant high-frequency pole is set by the total input capacitance $C_{\pi} + C_{Miller}$ and the source resistance $R_s$:

$$f_{H} = \frac{1}{2\pi (C_{\pi} + C_{Miller}) R_s}$$

Worked Example — CE Stage Q-Point & Gain

$V_{CC} = 12$ V, $R_{B1} = 82$ k$\Omega$, $R_{B2} = 22$ k$\Omega$, $R_C = 3.3$ k$\Omega$, $R_E = 1$ k$\Omega$, $\beta = 150$.

$V_{TH} = 12 \times 22/104 = 2.538$ V; $R_{TH} = 82\|22 = 17.15$ k$\Omega$. $I_B = (2.538-0.7)/(17150 + 151\times1000) = 1.838/168150 = 10.93$ μA. $I_C = 150 \times 10.93 = 1.640$ mA. $V_{CE} = 12 - 1.640(3.3+1) = 12 - 7.05 = 4.95$ V. Active region ✓. $g_m = 1.640/26 = 63.1$ mA/V. $A_v = -63.1 \times 3.3 = -208$ V/V. ✓

BJT Bias Calculator — Q-Point & Load Line
V_B (base) =?V
I_C (collector) =?mA
V_CE =?V
g_m =?mA/V
r_π =?kΩ

Practice Problems

1. For the bias circuit with $V_{CC}=15$ V, $R_{B1}=100$ k$\Omega$, $R_{B2}=33$ k$\Omega$, $R_C=4.7$ k$\Omega$, $R_E=1.5$ k$\Omega$, $\beta=200$: compute $I_C$, $V_{CE}$, $g_m$, and $A_v$ (with $R_E$ bypassed).
2. Derive the expression for the AC emitter-degenerated gain $A_v = -g_m R_C' / (1 + g_m R_E)$ where $R_C' = R_C \| R_L$. Show it reduces to $-R_C'/R_E$ for $g_m R_E \gg 1$.
3. A CE stage has $g_m = 40$ mA/V, $C_{\pi} = 10$ pF, $C_\mu = 3$ pF, $R_C = 5$ k$\Omega$, $R_s = 1$ k$\Omega$. Compute $C_{Miller}$ and the high-frequency $-3$ dB pole $f_H$.
MOSFET Common-Source Amplifier — Biasing & Small-Signal Analysis