IEC 61131-3 Timers, Counters & Structured Text

IEC 61131-3 Timers, Counters & Structured Text

1. TON — On-Delay Timer

The TON function block has three parameters:

• IN (BOOL) — enable input. Timer accumulates while IN = TRUE.
• PT (TIME) — preset time, e.g., T#5s.
• ET (TIME) — elapsed time output, incremented each scan: $ET_{n+1} = ET_n + T_{scan}$ while IN = TRUE.
• Q (BOOL) — output. $Q = (IN \text{ AND } ET \geq PT)$.

Timing accuracy is limited by scan jitter: the true output delay is $PT \pm T_{scan}$, meaning a 5 s preset on a 10 ms scan can fire anywhere in [4.990 s, 5.010 s]. For sub-millisecond timing, a hardware timer interrupt or high-speed module is required.

2. CTU — Up-Counter

The CTU counts rising edges on the CU (count-up) input:

$$CV_{n+1} = \begin{cases} 0 & \text{if RESET = TRUE} \\ CV_n + 1 & \text{if CU rises and } CV_n < PV \\ CV_n & \text{otherwise} \end{cases}$$

Output $Q = (CV \geq PV)$. Counter preset $PV$ is an INT (−32768 to +32767) or DINT (32-bit). Overflow behaviour is implementation-defined — always use DINT for production batch counting.

3. Structured Text (ST) for Complex Logic

ST is the highest-level IEC 61131-3 language, syntactically close to Pascal. A PID algorithm in ST:

error := setpoint - process_var;
integral := integral + error * dt;
if integral > integral_max then integral := integral_max;
elif integral < integral_min then integral := integral_min;
end_if;
derivative := (error - prev_error) / dt;
output := Kp*error + Ki*integral + Kd*derivative;
prev_error := error;

ST is particularly powerful for:

• Mathematical expressions with precedence (no need for multiple rungs)
• FOR/WHILE loops over arrays (e.g., sliding-window averages)
• CASE statements implementing state machines with dozens of states
• Calling function blocks and user-defined functions (POU architecture)

4. Sequential Function Chart (SFC) — GRAFCET

SFC (IEC 61131-3 §6.8) models sequential processes as a directed graph of steps and transitions. A step is active or inactive; transitions fire when their condition becomes TRUE, deactivating the current step and activating the next. Convergence/divergence tokens model parallel branches (AND-divergence) and alternative branches (OR-divergence). SFC is preferred over long CASE statements for >10-state machines because the graph is self-documenting and auditable.

CASE state OF
  0: fill_valve := FALSE; drain_valve := FALSE;
     IF start AND tank_empty THEN state := 1; END_IF;
  1: fill_valve := TRUE;
     IF high_level THEN state := 2; END_IF;
  2: drain_valve := TRUE; fill_valve := FALSE;
     IF low_level THEN state := 0; END_IF;
END_CASE;